container2wasm has TinyEmu for RISC-V.
dearchap/tinyemu: https://github.com/dearchap/tinyemu
Qemu also supports 32bit and 64bit RISC-V: "RISC-V System emulator — QEMU documentation" https://www.qemu.org/docs/master/system/target-riscv.html
Emu86 emulates RISC-V in Python and also WASM now IIRC: https://news.ycombinator.com/item?id=41899475 .. https://github.com/gcallah/Emu86/blob/master/assembler/virtu... :
class RISCVMachine(VirtualMachine):
(Box96/Box64 emulates x86 on ARM64 and RISC-V; e.g. Portal)
From https://news.ycombinator.com/item?id=44979868 :
> openhwgroup has open Verilog implementations of RISC-V cores from 2 stages through 6 stages that will boot Linux: https://github.com/openhwgroup
container2wasm has TinyEmu for RISC-V.
dearchap/tinyemu: https://github.com/dearchap/tinyemu
Qemu also supports 32bit and 64bit RISC-V: "RISC-V System emulator — QEMU documentation" https://www.qemu.org/docs/master/system/target-riscv.html
Emu86 emulates RISC-V in Python and also WASM now IIRC: https://news.ycombinator.com/item?id=41899475 .. https://github.com/gcallah/Emu86/blob/master/assembler/virtu... :
Also:(Box96/Box64 emulates x86 on ARM64 and RISC-V; e.g. Portal)
From https://news.ycombinator.com/item?id=44979868 :
> openhwgroup has open Verilog implementations of RISC-V cores from 2 stages through 6 stages that will boot Linux: https://github.com/openhwgroup