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pure speculation:

the FPGA does the PCIe and all necessary data marshaling, which allows a lot of flexibility for updates and bug fixing on the most finicky parts of hardware

two ASICs because once you have one manufactured, most of the costs are sunk and per unit it's cheap to stick a second on the board



You're probably right. The FPGA is probably the most expensive part of this board by far, and maybe they figured the FPGA and the PCIE bus can handle enough traffic to keep two compression chips busy.


The FPGA is also potentially insurance for bugs on the ASIC that aren't economical to fix. Catch the bug and fix it on the way out of the card.


FPGAs are cheap compared to the initial run costs for comparable custom ASICs, though.




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