I guess I was unclear. I am trying to understand why the threshold voltage can't be reduced below what came across as a hard limit of 0.75V. My guess was that even a finFET can't give you the channel control required to prevent the transistor from approaching a lower threshold voltage. Which means it's half-on when it's supposed to be off, which means you've got a lot more leakage. But surely you can tweak it a bit more: make the fin taller, wrap it around the channel a little bit? And then maybe get a slightly lower threshold voltage? Maybe it's just not worth the hassle and having gate all around is a better return.