I think of the iAPX 432 as "over-designed and under-engineered".
Intel was writing architectural checks (bit-aligned instructions, capability-based permissions, "everything is an object") they couldn't cash (very, very bad performance).
I'm a software guy, so naturally I took a course in VLSI design in college. It was fun. This was maybe a year before the iAPX 432 was canceled; our teacher had some sample chips embedded in clear plastic, gewgaws handed out at some conference he'd been to. He passed them around one day in class, and they were huge and there were like four of them in the processor chipset. And I remember thinking "how the heck is that thing going to be fast with all that off-chip traffic?" And of course it wasn't.
Elliot Organick, of Multics fame, wrote a book about the 432 architecture. I just found it on my bookshelf and leafed through it again; I'd forgotten that all of his code examples were in Ada (another "big bet" at the time).
Intel was writing architectural checks (bit-aligned instructions, capability-based permissions, "everything is an object") they couldn't cash (very, very bad performance).
I'm a software guy, so naturally I took a course in VLSI design in college. It was fun. This was maybe a year before the iAPX 432 was canceled; our teacher had some sample chips embedded in clear plastic, gewgaws handed out at some conference he'd been to. He passed them around one day in class, and they were huge and there were like four of them in the processor chipset. And I remember thinking "how the heck is that thing going to be fast with all that off-chip traffic?" And of course it wasn't.
Elliot Organick, of Multics fame, wrote a book about the 432 architecture. I just found it on my bookshelf and leafed through it again; I'd forgotten that all of his code examples were in Ada (another "big bet" at the time).