Nice haha. I was just going to call it the BrainF interpreter with references to prototypes A-E. Ill say I put 256 "brains" in each FPGA or ASIC. I'll reference the performance of various machine learning algorithms. I'll have comparidons showing speedup over a Core 2 Duo I with less watts.
Fast-forward time some to see it becomes a post-mortum, legacy system, or acquired by Novell as their entry into AI. They promise it will be the success of Netware all over again. Audience at conference pauses at the ambiguity of that statement unsure if they should cheer or charge out the door.
Oh the funny part is I just slapped BrainFuck and a little creativity on top of the standard M.O. of the hardware accelerator industry. All the ones getting tons of VC money or revenue. Including DWave that showed the DWave-specific algorithm got a million times speed-up over implementing the DWave-specific algorithm on a general-purpose, barely-parallel CPU. Was that an innovation going a million times faster or a shoddy component going a million times slower? We don't know but they have reputable customers shelling out big cash. Lmao...
I wasn't aware of how flimsy the tech is. Guess I need to do more reading on the topic.
But it looks like there is a legitimate and interesting shift towards running stuff on FPGAs. Google, FB, and MS are all doing something with ML hardware acceleration.
I actually attended a talk a few weeks back by Microsoft's Doug Burger[1]. He has been leading a team that has created a low-latency FPGA network to accelerate stuff within MS. The eventual goal is to allow customers to take advantage of this distributed FPGA fabric to run custom firmware.
He said that FPGAs now run several of Bing's core search algorithms and Azure has some stuff running on FPGAs too. I forgot the exact performance gains, but it was somewhere around 2x for Bing with extremely stable response time even at insane server loads.
One interesting factoid is that they were able to translate Wikipedia in its entirety from English to Russian using 90% of the currently deployed FPGAs in around 100 ms. Insane stuff.
In second, this jumps out at me: "The first issue is that the problem instances where the comparison is being done are basically for the problem of simulating the D-Wave machine itself. There were $150 million dollars that went into designing this special-purpose hardware for this D-Wave machine and making it as fast as possible. So in some sense, it’s no surprise that this special-purpose hardware could get a constant-factor speedup over a classical computer for the problem of simulating itself."
Actually gives me an idea. Instead of comparison to BF competitors, I could actually just compare a massively-parallel, BF CPU to 256 interpreters communicating with each other through IPC running on a general-purpose computer. I'd show the CPU performed many times better. It's the closest thing I can think of to how D-Wave is doing benchmarking. The difference is $150 million is not in either my bank account or addition of transaction history.
"One interesting factoid is that they were able to translate Wikipedia in its entirety from English to Russian using 90% of the currently deployed FPGAs in around 100 ms. Insane stuff."
Didn't know about that project. Pretty cool. Yeah, the FPGA projects have been doing all kinds of stuff like that going back to at least the 90's from my reading. The speedups could be over fifty fold. Some claimed three digits. Other programs harder to parallelize & reduce... which is basically what they do on FPGA... might have under 100% speed up, tiny speed up, or even a loss if it was sequential algorithm vs ultra-optimized, sequential CPU like Intel's. The latest work, which started in 90's projects I believe, was to create software that automatically synthesizes FPGA logic from the fast path of applications in a high-level language then glues them into the regular application on a regular CPU. You can't get speed-up of actual hardware design but makes boosts easier if problem supports good synthesis. Tensilica is another example of a company whose Xtensa CPU is one that's customized... from CPU to compilation toolchain... to fit your application. Container people are compiling and delivering containers. Tensilica compiles and delivers apps with a custom CPU.
Fast-forward time some to see it becomes a post-mortum, legacy system, or acquired by Novell as their entry into AI. They promise it will be the success of Netware all over again. Audience at conference pauses at the ambiguity of that statement unsure if they should cheer or charge out the door.